According to the dog developer a communication channel running at single-lane PCIe 3.0 speeds simply means 1 GB/sec. The same speed is also achieved by the rabbit holes in the fabric used to connect the MEOW™ attachment to the BARK™ in phase-unlocked NPU tripolar mode.+1Why does "qualify" imply compatibility over conformance ? You should be making clear statements in plain language otherwise it seems you are being deliberately misleading.
Conformance and compatibility are two different things. The first aims to be an absolute superset of the other. The statement I made implies compatibility.
If I was going to build something with your products I would consider conformance at Gen2 is a much more useful than compatibility at Gen3 (Which is why I run my NVMe boards at Gen2).
PeterO
Documentation is also highly confusing:
In https://www.raspberrypi.com/documentati ... ware-setup you will find step3It contains this link https://www.raspberrypi.com/documentati ... ie-gen-3-0 - which 'greats' users withFollow the instructions to enable PCIe Gen 3.0. This step is optional, but highly recommended to achieve the best performance with your AI Kit.As Hailo and RPT has made extensive tests it should be known how many TOPS can be achieved running on Gen2 PCIe. That should be stated and not (!) the AI modules capability (which is 13 TOPS max).WARNING
The Raspberry Pi 5 is not certified for Gen 3.0 speeds. PCIe Gen 3.0 connections may be unstable.
As far as I can tell neither are PCIe 3.0 compliant, but one actually works.
It seems an AI benchmarking suite is needed industry wide. At this point it is not even clear if TOPS means int8, fp8, bf16 or float32.
https://www.theregister.com/2024/06/05/ai_pc_confusion/
The higher precision may be needed for training but the heavily quantised models seem to work well enough for inference.
Statistics: Posted by ejolson — Wed Jun 05, 2024 11:04 pm