Each GPIO bank can raise interrupt to either core 0 or core 1 or dormant wake, however they will share a single interrupt service routine. In the ISR you have to check which core is the ISR is running on and then check which pin caused the interrupt and ultimately acknowledge the interrupt.
If you need dedicated Interrupt service routine for each core for some reason, then separate interrupt vector table have to be used for core 1, which will allow you set different GPIO interrupt handler for core0 and core1.
If you need dedicated Interrupt service routine for each core for some reason, then separate interrupt vector table have to be used for core 1, which will allow you set different GPIO interrupt handler for core0 and core1.
Statistics: Posted by Heisen — Tue Oct 22, 2024 2:13 am