Changed the overlay to allow running it on my HW. I've tested this on a 6.6 kernel (and no, will not test on 6.1 as I don't have a HW running this kernel)Here's the output of raspinfo (raspinfo | pastebinit) when running on dual-lane DSI (as you've asked for log info)
https://paste.debian.net/hidden/6635f8e6/
Step back from the idea to run this timing on 4-lane DSI! It's not needed (note: I'm running the FHD screen on 3-lanes) --> limit no of DSI lanes to 3.
Actions for you:
- test your I2C-0 interface on your HW
- get rid of all the overlays that you don't need and bring up your display fist. then add your other overlays one after the other
- if not done yet, add below to your config.txt
Code:
/* * vc4-kms-dsi-ti-sn65dsi83-somepanel-overlay.dts *//dts-v1/;/plugin/;/ { compatible = "brcm,bcm2835"; /* PWM0 function */ fragment@0 { target = <&gpio>; __overlay__ { pwm_pins: pwm_pins { brcm,pins = <12>; brcm,function = <4>; brcm,pull = <0>; }; }; }; fragment@1 { target = <&pwm>; frag1: __overlay__ { pinctrl-names = "default"; pinctrl-0 = <&pwm_pins>; assigned-clock-rates = <100000000>; status = "okay"; }; }; fragment@2 { target-path = "/"; __overlay__ { //#gpio-cells = <2>; /* Panel backlight through PWM0 on GPIO 12 */ backlight_lvds: backlight { compatible = "pwm-backlight"; pwms = <&pwm 0 5000000 0>; /* Period of 5000000ns means 200Hz */ brightness-levels = <0 1000>; num-interpolated-steps = <1000>; default-brightness-level = <800>; /* enable-gpios = <&gpio 22 0>; Backlight enable... */ }; panel: panel { compatible = "panel-lvds"; backlight = <&backlight_lvds>; /* Physical dimensions of active area */ width-mm = <217>; height-mm = <136>; data-mapping = "vesa-24";panel-timing {clock-frequency = <66300000 69300000 78900000>;de-active = <1>;hactive = <1280 1280 1280>;hback-porch = <64 64 64>;hfront-porch = <16 16 16>;hsync-active = <0>;hsync-len = <24 24 24>;pixelclk-active = <1>;vactive = <800 800 800>;vback-porch = <24 24 24>;vfront-porch = <8 8 8>;vsync-active = <0>;vsync-len = <8 8 8>;}; port { panel_in_lvds: endpoint { remote-endpoint = <&bridge_out>; }; }; }; }; }; fragment@3 { // required by aBUGSworstnightmare's HW target = <&i2c_csi_dsi>; //target = <&i2c_vc>; __overlay__ { #gpio-cells = <2>; #address-cells = <1>; #size-cells = <0>; status = "okay"; bridge@2c { compatible = "ti,sn65dsi83"; reg = <0x2c>; // required by aBUGSworstnightmare's HW enable-gpios = <&gpio 26 0>; //enable-gpios = <&gpio 22 0>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; bridge_in: endpoint { remote-endpoint = <&dsi_out_port>; // 3-lane DSI is fine here data-lanes = <0 1 2>; }; }; port@2 { reg = <2>; bridge_out: endpoint { remote-endpoint = <&panel_in_lvds>; }; }; }; }; }; }; fragment@4 { target = <&dsi1>; __overlay__ { #address-cells = <1>; #size-cells = <0>; status = "okay"; port { dsi_out_port: endpoint { remote-endpoint = <&bridge_in>; // 3l-lane DSI is fine here data-lanes = <0 1 2>; }; }; }; }; fragment@5 { target = <&i2c0if>; __overlay__ { status = "okay"; }; }; fragment@6 { target = <&i2c0mux>; __overlay__ { status = "okay"; }; };};- Image may be NSFW.
Clik here to view.
https://paste.debian.net/hidden/6635f8e6/
Step back from the idea to run this timing on 4-lane DSI! It's not needed (note: I'm running the FHD screen on 3-lanes) --> limit no of DSI lanes to 3.
Actions for you:
- test your I2C-0 interface on your HW
- get rid of all the overlays that you don't need and bring up your display fist. then add your other overlays one after the other
- if not done yet, add below to your config.txt
Code:
dtdebug=1Statistics: Posted by aBUGSworstnightmare — Sat Mar 02, 2024 7:34 am
