Thanks a lot for the support. The route with writing 10bit packed to memory seems to be more trouble than it's worth at the moment.
Right now I'm writing only the embedded data in a custom format which I can easily preprocess in the camera helper and left the data in its original format so at least the issue I was running into has been addressed.
Regarding the embedded data, I found that the buffer size always remained the same, regardless of which embedded data lines were enabled/disabled using the registers mentioned in this thread.
Is this caused by the following line in the imx708 driver?The camera helper inside libcamera uses the size of the embedded data buffer to determine if some data is available, but since the size appears to be always the same I guess it's assuming that all 5 embedded data lines are present.
Regarding the actual image data. Going through the ISP documentation I found that there are some compression/companding schemes that are optionally used inside the ISP to reduce bandwidth. Would it be possible for me to implement those schemes in the FPGA and tell the front-end that it's already receiving PISP_MODEX data stright from the camera? And if so, is there some source code library or pseudo code for the compression, because the explanation inside the document is rather brief. The most strightforward companding scheme to implement on fpga would be mode 2, but even there I see that it uses non-linear companding by interpolatingHere I'm not sure why all 16 bit entries are powers of 2 while the last entry is 65024 instead of the max value 65535
Right now I'm writing only the embedded data in a custom format which I can easily preprocess in the camera helper and left the data in its original format so at least the issue I was running into has been addressed.
Regarding the embedded data, I found that the buffer size always remained the same, regardless of which embedded data lines were enabled/disabled using the registers mentioned in this thread.
Is this caused by the following line in the imx708 driver?
Code:
#define IMX708_EMBEDDED_LINE_WIDTH (5 * 5760) Regarding the actual image data. Going through the ISP documentation I found that there are some compression/companding schemes that are optionally used inside the ISP to reduce bandwidth. Would it be possible for me to implement those schemes in the FPGA and tell the front-end that it's already receiving PISP_MODEX data stright from the camera? And if so, is there some source code library or pseudo code for the compression, because the explanation inside the document is rather brief. The most strightforward companding scheme to implement on fpga would be mode 2, but even there I see that it uses non-linear companding by interpolating
Code:
(0,0), (256,16), (512,24), (2048,48), (8192,96), (32768,192), (65024,255).Statistics: Posted by ncorneli — Wed Apr 23, 2025 3:33 pm