To add a few details, these are the locations where UARTs can be enabled on Pi 4. I've focused on the TXD/RXD pair, ignoring RTS/CTS, to reduce the length. For example, UART0 appears as TXD0 and RXD0:Notice that UART0 and UART1 can both appear on GPIOs 14&15 and 32&33, although obviously only one UART per location at any time. UART0 is also available on 36&37, and UART1 is also on 40&41. This means that you can either have UART0 on the GPIO header or UART1, but not both.
The extra UARTs in BCM2711 can only appear on the 40-pin header:
Code:
0, GPIO0, SDA0, SA5, PCLK, SPI3_CE0_N, TXD2, SDA61, GPIO1, SCL0, SA4, DE, SPI3_MISO, RXD2, SCL64, GPIO4, GPCLK0, SA1, DPI_D0, SPI4_CE0_N, TXD3, SDA35, GPIO5, GPCLK1, SA0, DPI_D1, SPI4_MISO, RXD3, SCL38, GPIO8, SPI0_CE0_N, SD0, DPI_D4, I2CSL_CE_N, TXD4, SDA49, GPIO9, SPI0_MISO, SD1, DPI_D5, I2CSL_SDI_MISO, RXD4, SCL412, GPIO12, PWM0_0, SD4, DPI_D8, SPI5_CE0_N, TXD5, SDA513, GPIO13, PWM0_1, SD5, DPI_D9, SPI5_MISO, RXD5, SCL514, GPIO14, TXD0, SD6, DPI_D10, SPI5_MOSI, CTS5, TXD115, GPIO15, RXD0, SD7, DPI_D11, SPI5_SCLK, RTS5, RXD132, GPIO32, GPCLK0, SA1, -, TXD0, SD_CARD_PRES, TXD133, GPIO33, -, SA0, -, RXD0, SD_CARD_WRPROT, RXD136, GPIO36, SPI0_CE0_N, SD0, TXD0, SD1_DAT0, RGMII_RX_OK, MII_A_RX_ERR37, GPIO37, SPI0_MISO, SD1, RXD0, SD1_DAT1, RGMII_MDIO, MII_A_TX_ERR40, GPIO40, PWM1_0, SD4, -, SD1_DAT4, SPI0_MISO, TXD141, GPIO41, PWM1_1, SD5, -, SD1_DAT5, SPI0_MOSI, RXD1The extra UARTs in BCM2711 can only appear on the 40-pin header:
Code:
0, GPIO0, SDA0, SA5, PCLK, SPI3_CE0_N, TXD2, SDA61, GPIO1, SCL0, SA4, DE, SPI3_MISO, RXD2, SCL64, GPIO4, GPCLK0, SA1, DPI_D0, SPI4_CE0_N, TXD3, SDA35, GPIO5, GPCLK1, SA0, DPI_D1, SPI4_MISO, RXD3, SCL38, GPIO8, SPI0_CE0_N, SD0, DPI_D4, I2CSL_CE_N, TXD4, SDA49, GPIO9, SPI0_MISO, SD1, DPI_D5, I2CSL_SDI_MISO, RXD4, SCL412, GPIO12, PWM0_0, SD4, DPI_D8, SPI5_CE0_N, TXD5, SDA513, GPIO13, PWM0_1, SD5, DPI_D9, SPI5_MISO, RXD5, SCL5Statistics: Posted by PhilE — Mon Mar 11, 2024 9:21 am
