For a modern high-speed device, I think it's more meaningful to think of this the other way around:It's not a provision of power issue as such. I would phrase it that the capacitors are there to 'reduce noise' on the pin, keep it at a more stable voltage than it will be without.
The chip is powered entirely by the capacitors close to the power pins
The function of the wiring from the PSU to those capacitors is simply to keep the capacitors topped up.
(this is not actually saying anything different from what you are saying, just putting the emphasis the other way around).
To explain the background to this for the benefit of the OP:
CMOS devices use very little power when they are sitting there doing nothing; nearly all of the power is used in changing the state of signals from 0 to 1 or vice-versa. So the load on the power supply isn't a continuous 20mA or whatever number your multimeter may suggest - it's very short pulses of current every time a signal changes state. The core of the RP2350 is running at (typically) 150MHz - so it's consuming power in very short pulses at that frequency. 150MHz in other contexts would be regarded as "radio frequency" - at that sort of frequency, wires don't behave like wires at all. So the only hope of delivering these pulses of current is to put capacitors as close to the device as possible, minimising the amount of wire in the critical circuit.
So although your schematic shows all the capacitors wired in parallel, imagine each of those lines on the schematic to be not a wire but rather a small inductor and you have a better idea of how it works in practice.
Even the connections inside the capacitor itself are significant, so physically smaller capacitors are better - 0402 size are typically used; if you use a capacitor of the same nominal capacitance but in a bigger case size (like 0805) then it will perform worse.
The other thing people often forget in these designs is that current only flows around a circuit: it's all very well to put one end of the capacitor very close to the Vdd pin on the RP2xxx, but the other end of the capacitor (connected to "ground") is equally important. It must have a very short route back to the ground pad on the bottom of the RP2xxx - it's the length of this loop that matters, rather than the length of any one connection. When a signal switches inside the CPU, current flows round that loop: from the + end of the capacitor, to the Vdd pin on the chip, through the logic that's switching, out through the ground pad on the bottom of the chip and into the other end of the capacitor.
This is easy to get right on a 4-layer board with one of the inner layers dedicated as a groundplane; on a 2-layer board it requires significant effort to do a good job. Given limited space, you should prioritise signals in the order of how fast and/or sensitive they are. The fastest thing on a typical RP2xxxx design is the CPU, so the power to the CPU (ie. the decoupling capacitors) should go in the design first, then the connections to the flash chip, then the crystal, then any GPIOs being used for high-speed interfaces, then very last and given the least favourable routing are things like GPIOs driving LEDs. Typically you want to treat the area around the RP2xxx chip as effectively a single-sided PCB - route all the signals on the top side, keep the bottom as mostly ground and just very short links where tracks on the top side need to be crossed over each other. If you have slow GPIOs that happen to come out of the wrong side of the chip for convenient routing, then either reassign the GPIOs so they come out on the right side, or else let them wander around the edge of the board - don't destroy your nice short ground connections to the decoupling capacitors by having a big row of irrelevant signals slicing the ground area in half.
Statistics: Posted by arg001 — Thu Jun 12, 2025 9:47 pm