General • Re: Logic Analyser

PIO running at 1200Mhz

Old news, PIO at 1560 MHz viewtopic.php?p=2323795#p2323795
I've cut the clocks... it helps a lot.

can you tell me how you got to 1200Mhz, is it PLL divider 1 & 2 = 1 and PLL = 100. did you program them directly or use SDK clock functions??

yep PLL postdivider=1, and feedback divider (which is a multiplier) = freq/12 (100 for 1200MHz).
Did it mostly from debugger, but can write the FBDIV_INT register as the last wish before the cores crash.
After crashing, the cores get in hardfault lock state (coma), pretty harmless.

>> RAM started to fail at around 800 MHz, ROM at 850, SWD debugger at 900.
did you just let them fail and leave them as is OR turn them off. I'm not testing with any cooling, I think you are from your description.

Gradually increasing the PLL frequency (in debugger), and observing the glitches.
Yes I do some cooling using a small radiator on top of the chip.

>> Wow, just wow.
Yeah, fully agree with this statement, GOOD WORK

Thanks, it's fascinating, but also thanks to you, otherwise I wouldn't have pushed so far

Statistics: Posted by gmx — Wed Jul 02, 2025 6:04 am

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