I have been attempting to design and build a custom RP2040 microcontroller with the help of the "Hardware Design with RP2040" documentation. From this, I was able to build a board that is recognized by my computer as a mass storage device; however when I attempted to flash "blink.uf2", the device would eject from my computer but immediately enter bootselect mode again and never run the code. This seemed to indicate that something was wrong with my chip select (CS) pin on my flash memory device, and this was confirmed by Picotool.
I'm using the Winbond W25Q128JVSIQ, and I wired it according to the reference schematic like so:
To my understanding, CS must be pulled to low when the RP2040 is reading/writing to memory. How does this is widely used design accomplish that if the CS node is always supplied 3V3? Since the button is in parallel, I feel like it wouldn't actually ground CS like it should. What's more confusing is when I removed the 3V3 line to the CS pin on my PCB, my board started to work, and I was able to easily upload code and watch as the onboard LED responded. I would appreciate any clarification on how this pin works and general advice on my schematic if there are errors.
I'm using the Winbond W25Q128JVSIQ, and I wired it according to the reference schematic like so:
To my understanding, CS must be pulled to low when the RP2040 is reading/writing to memory. How does this is widely used design accomplish that if the CS node is always supplied 3V3? Since the button is in parallel, I feel like it wouldn't actually ground CS like it should. What's more confusing is when I removed the 3V3 line to the CS pin on my PCB, my board started to work, and I was able to easily upload code and watch as the onboard LED responded. I would appreciate any clarification on how this pin works and general advice on my schematic if there are errors.
Statistics: Posted by mosfet89 — Sun Apr 14, 2024 4:25 pm