General • Re: RP2350 assembly code core 1

The problem is that core 1 will not start.
I suspect that could be a result of the boot process not getting the correct IMAGE_DEF to initalise core 1 or it's SALT register, or maybe a security issue. I am not building with the SDK but rather bare metal as follows;
arm-none-eabi-as -g -mcpu=cortex-m33 -mthumb Test_board.s -o Test_board.o
arm-none-eabi-gcc -nostdlib -T Linker2350.ld -Wl,-Map=Test_board.map -o Test_board.elf Test_board.o
.pico-sdk\picotool\2.1.0\picotool\picotool.exe uf2 convert Test_board.elf Test_board.uf2 --family absolute --offset 0x10000000
I assume you build with the SDK, are you able to see what IMAGE_DEF is used for your build?
My code is as follows. It blinks the LED slow from core 0 and fast if core 1 starts. I don't know how to put it in a scroll box like you did.

.syntax unified
.arch armv8-m.main
.cpu cortex-m33
.fpu softvfp
.thumb


.equ CPU_LED, 25

.equ M0PLUS_VTOR_OFFSET_bm, 0x0000ED08
.equ rst_clr, 0x40023000 // atomic register for clearing reset controller
.equ RESETS_BASE, 0x40020000 // reset controller base 2.14.3 pg483
.equ SIO_BASE_bm, 0xD0000000 // pg 36
.EQU IO_BANK0_BASE_bm, 0x40028000 // pg 575 Write any value to release (alt funct pg578)
.EQU PADS_BANK0_BASE_bm, 0x40038000 // pg 575
.equ PPB_BASE_bm, 0xE0000000 // pg 141

.global start

.section .vectors, "ax"
.word__stack //start of stack pointer
.wordstart +1 //reset
.word0x100001c3//isr_nmi
.word0x100001c5//isr_hardfault
Remaining_vectors: .FILL 0x400

.align 4
// ref: RP2350 datasheet 5.9.5.1. Minimum Arm IMAGE_DEF
.section .picobin_block, "a" // single block with two items (IMAGE_TYPE and LAST)
.word 0xffffded3 // PICOBIN_BLOCK_MARKER_START
.byte 0x42 // item 0 IMAGE_TYPE - PICOBIN_BLOCK_ITEM_1BS_IMAGE_TYPE
.byte 0x1 // item is 1 word
.hword 0b0001000000100001
.byte 0xff // item 1 LAST - PICOBIN_BLOCK_ITEM_2BS_LAST
.hword 0x0001 // item is 1 word
.byte 0 // pad
.word 0 // 0 means a link to itself, meaning there is no other block
.word 0xab123579 // PICOBIN_BLOCK_MARKER_END

.align 4
.section .text

start:

//releases the peripheral reset for iobank_0
ldr r0, =rst_clr// atomic register for clearing reset controller (0x40020000+0x3000)
LDR r2, =0x40 // bits 6(GPIO)
str r2, [r0, #0] // store the bitmask into the atomic register to clear register

BL Delay

ldr r0, =__data_start__ // Copy data to RAM
ldr r1, =__data_end__
sub r2,r1,r0
ADD R2,#1
ldr r1, =__data_source__
cpy_loop:
ldrb r3, [r1]
strb r3, [r0]
add r1, r1, #1
add r0, r0, #1
subs r2, r2, #1
BNE cpy_loop


// ************* GPIO SETUP *************
MOVR3, #1 @ Initialize the GPIO
LSLR3,#CPU_LED @ shift over to pin position
LDRR2, =SIO_BASE_bm @ address we want
STRR3, [R2, #0x38] // for output
STRR3, [R2, #0x20] // clear
LDRR2, =PADS_BANK0_BASE_bm @ Enable input and output for the pin
ADDR2,#CPU_LED*4 @ pin * 4 for register address
MOVR1, #0x40
LDRR4, =0x2000 // setoffset
ORRR2, R4
STRR1, [R2, #4]
LDR R1,=0x1000 // for atomic clear
ADD R2,R1
LDR R1,=0x100 // remove Pad isolation control bit
STRR1, [R2, #4]
LDRR2, =IO_BANK0_BASE_bm // set GPIO function
ADDR2,#CPU_LED*8
MOVR1, #5
STRR1, [R2, #4]

// ************* Start core 1 *************

MOV R4,#60 // copy IVT for core1
LDR R3,=PPB_BASE_bm
LDR R1,=M0PLUS_VTOR_OFFSET_bm
ADD R3,R1
LDR R1,[R3]
LDR R5,=Core1_IVT
Sup02: LDR R0,[R1],#4
STR R0,[R5],#4
SUBS R4,#1
BNE Sup02

LDR R2,=SIO_BASE_bm
MOV R1,#8 // ensure empty fifo
1: LDR R0,[R2,#0x58] // SIO_FIFO_RD_OFFSET
SUBS R1,#1
BNE 1b
SEV

MOV R3,#6 // Write 6 parameter string to FIFO
LDR R1,=Core1_init_table
1: LDR R0,[R1],#4
STR R1,[R2,#0x54] // SIO_FIFO_WR_OFFSET
SUBS R3,#1
BNE 1b
SEV

BL Delay
MOV R1,#8 // ensure empty fifo
1: LDR R0,[R2,#0x58] // SIO_FIFO_RD_OFFSET
SUBS R1,#1
BNE 1b
LDR R4, =SIO_BASE_bm
MOV R5,#CPU_LED

LOOP: LDR R2,=Delay_countdown
LDR R2,[R2]
1: SUBS R2,#1
BNE 1b // delay

MOV R3,#1 // TEST TOGGLE CPU_LED
EOR R1,R3
LSL R3,R5 @ shift over to pin position
MOV R6,#0x20 // for off
TST R1,R1
BNE 1f
MOV R6,#0x18 // for on
1:
STRR3, [R4,R6] // turn LED on/off
B LOOP


.align 4 // ------------ CORE 1 loop --------------
.thumb_func
.type Core1_entry, %function
Core1_entry: PUSH {LR}
LDR R3,=Delay_countdown
LDR R0,=0x0004FFFF
STR R0,[R3]
1: NOP
B 1b


Delay: PUSH {R0,LR}
LDR R0,=0x0008FFFF
1: SUBS R0,#1
BNE 1b
POP {R0,PC}

.align 4
.section .data
Delay_countdown: .word 0x002FFFFF
Core1_init_table: .word 0
.word 0
.word 1
.word Core1_IVT
.word stack1_end
.word Core1_entry

.bss
.align 4
Core1_scratch: .word 0
.align 8
Core1_IVT: .FILL 0x400
stack1: .FILL 0x800
stack1_end: .word 0

Statistics: Posted by des234m — Sun Jul 27, 2025 9:43 am

---