Ok, I solve the issue.
This is all related to the GPIO code that I did to control select pins of another device. The problem was not something exotic like value swapping because of the async nature of the AXI bus that connects peripherals, or stale data in the rx buffer, nor some obscure quirk about the spidev driver and the Linux kernel.
The issue is purely coincidental. I am using CS0 and CS1(GPIO7) of SPI0 and separately GPIO5 as an external toggle. When I was setting up the initial state of GPIO5, I setup a macro to assign the bit shifted 5 to the correct position to Clear the GPIO state. However, I failed to realize that my macro would bit shift the value 5, 5 bit positions. Setting coincidentally bit positions 5 AND 7 of the GPIOCLR0 register that is memory mapped. When I go read from the SPI bus the CS1 line was already asserted and the SPI peripheral shifted in nothing from that SPI device because it is a memory chip where the command and address need to be written first before any data is returned.
The fix to the my problem is to change the macro from ((x) << 5) to (1 << (x)).
0x5 << 0x5 = 0xA0 ... Who knew?
This is all related to the GPIO code that I did to control select pins of another device. The problem was not something exotic like value swapping because of the async nature of the AXI bus that connects peripherals, or stale data in the rx buffer, nor some obscure quirk about the spidev driver and the Linux kernel.
The issue is purely coincidental. I am using CS0 and CS1(GPIO7) of SPI0 and separately GPIO5 as an external toggle. When I was setting up the initial state of GPIO5, I setup a macro
Code:
((x) << 5)The fix to the my problem is to change the macro from ((x) << 5) to (1 << (x)).
0x5 << 0x5 = 0xA0 ... Who knew?
Statistics: Posted by crimson4911 — Wed Mar 20, 2024 1:05 pm
